Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths-Reference-Cited by-同舟云学术

Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths

Published:2023-03 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Reliability Physics Symposium (IRPS)
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Author:

van Santen Victor M.¹,Gata-Romero Jose M.²,Nunez Juan²,Castro-Lopez Rafael²,Roca Elisenda²,Amrouch Hussam¹

Affiliation:

1. University of Stuttgart,Semiconductor Test and Reliability (STAR),Stuttgart,Germany

2. CSIC/Universidad de Sevilla,IMSE-CNM,Sevilla,Spain

Funder

German Research Foundation (DFG)

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10117589/10117581/10117751.pdf?arnumber=10117751

Reference21 articles.

1. Characterizing aging degradation of inte-grated circuits with a versatile custom array of reliability test structures;santana-andreo;2022 IEEE 34th International Conference on Microelectronic Test Structures (ICMTS),2022

2. Ring Oscillator Based Test Structure for NBTI Analysis

3. Razor: a low-power pipeline based on circuit-level timing speculation

4. Experimental Characterization of Time-Dependent Variability in Ring Oscillators

5. Layout dependent BTI and HCI degradation in nano CMOS technology: A new time-dependent LDE and impacts on circuit at end of life

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