The Correlation between the Reduction of Interface State Density at the SiO2/SiC Interface and the NO Post-Oxide-Annealing Conditions

Abstract

We fabricated SiO2/4H-SiC (0001) MOS capacitors with oxidation temperature at 1350°C, followed by post-oxide-annealing (POA) in NO simply by the control of POA temperatures and times. A correlation between the reduction of interface state density and the increasing of N concentration at the interface has been indicated by C-ψs measurement and secondary ion mass spectrometry (SIMS). The SiO2/4H-SiC interface density decreased when POA temperature was elevated, and the sample annealed at 1300°C for 30min showed the lowest interface state density about 1.5×1012 cm-2eV-1 at Ec-E=0.3 eV when the N concentration is 11.5×1020 cm-3. Meanwhile, the SiO2 /4H-SiC interface annealed at 1200°C for 120min showed the highest N concentration at the 4H-SiC/SiO2 interface is 12.5×1020 cm-3, whereas the interface state density is 2.5×1012 cm-2eV-1 at Ec-E=0.3 eV higher than 1300°C for 30min. The results suggested that higher temperature POA might be much more efficiency in decreased the 4H-SiC MOS interface density with increasing the N area concentration.