Long Carrier Lifetimes in n-Type 4H-SiC Epilayers

Abstract

Recent advances in preparing n-type 4H-SiC with long carrier lifetimes have greatly enhanced the possibility of realizing commercially available, very high voltage and high power solid state switching diodes. For the range > several kV, vertical bipolar structures are required with drift layers exhibiting carrier lifetimes ≥ several µsec. Recently, low-doped epilayers with carrier lifetimes in excess of this have been demonstrated, thus approaching a goal that has been pursued for over a decade. Historically, the short lifetimes in early epitaxial layers (a few hundred nsec) were eventually identified with the Vc-related Z1/2 lifetime killer. Current strategies to minimize this defect are an essential ingredient in the procedure for obtaining long-lifetime material. In order to optimize the attainable lifetimes, it has been shown that in addition to low Z1/2 levels, very thick layers are required to minimize the effects of recombination in the substrate and surface passivation is also necessary to minimize surface recombination (S < 1000 cm/sec).