Reduction of interface and oxide traps in SiO2/GaN MOS structures by oxygen and forming gas annealing

Author:

Mikake Bunichiro,Kobayashi TakumaORCID,Mizobata HidetoshiORCID,Nozaki Mikito,Shimura TakayoshiORCID,Watanabe HeijiORCID

Abstract

Abstract The effect of post-deposition annealing on the electrical characteristics of SiO2/GaN MOS devices was investigated. While the key to the improvement was using oxygen annealing to form an interfacial GaO x layer and forming gas annealing to passivate the remaining defects, caution must be taken not to produce a fixed charge through reduction of the GaO x layer. By growing the GaO x layer with oxygen annealing at 800 °C and performing forming gas annealing at a low temperature of 200 °C, it became possible to suppress the reduction of GaO x and to reduce the interface traps, oxide traps, and fixed charge simultaneously.

Funder

Japan Society for the Promotion of Science

Ministry of Education, Culture, Sports, Science and Technology

Publisher

IOP Publishing

Subject

General Physics and Astronomy,General Engineering

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