Annealing, temperature, and bias-induced threshold voltage instabilities in integrated E/D-mode InAlN/GaN MOS HEMTs
Author:
Affiliation:
1. Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravska cesta 9, 841 04 Bratislava, Slovakia
2. Institute of Electronics and Photonics of the Slovak Technical University of Technology, Ilkovičova 3, 812 19 Bratislava, Slovakia
Funder
Competence center for new materials, advanced technologies and energy
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
http://aip.scitation.org/doi/pdf/10.1063/1.4995235
Reference18 articles.
1. Scaling of GaN HEMTs and Schottky Diodes for Submillimeter-Wave MMIC Applications
2. Gate-recessed integrated E/D GaN HEMT technology with fT/fmax >300 GHz
3. Self-aligned normally-off metal-oxide-semiconductor n++GaN/InAlN/GaN high electron mobility transistors
4. Technology of integrated self-aligned E/D-mode n++GaN/InAlN/AlN/GaN MOS HEMTs for mixed-signal electronics
5. Temperature-Dependent Interface-State Response in an Al2O3/n-GaN Structure
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1. Characterization of different trap states in AlGaN/GaN MIS-HEMTs under high reverse gate stress;Micro and Nanostructures;2023-06
2. Negative bias-induced threshold voltage instability and zener/interface trapping mechanism in GaN-based MIS-HEMTs*;Chinese Physics B;2020-04-01
3. Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs;Journal of Circuits, Systems and Computers;2019-12-01
4. Impact of oxide/barrier charge on threshold voltage instabilities in AlGaN/GaN metal-oxide-semiconductor heterostructures;Materials Science in Semiconductor Processing;2019-03
5. Effect of Different Gate Lengths on Polarization Coulomb Field Scattering Potential in AlGaN/GaN Heterostructure Field-Effect Transistors;Scientific Reports;2018-06-13
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