A Novel Si Nanosheet Channel Release Process for the Fabrication of Gate-All-Around Transistors and Its Mechanism Investigation
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Published:2023-01-27
Issue:3
Volume:13
Page:504
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ISSN:2079-4991
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Container-title:Nanomaterials
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language:en
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Short-container-title:Nanomaterials
Author:
Sun Xin1ORCID, Wang Dawei1, Qian Lewen1, Liu Tao1, Yang Jingwen1, Chen Kun12, Wang Luyu1, Huang Ziqiang1, Xu Min123, Wang Chen123, Wu Chunlei123, Xu Saisheng1, Zhang David Wei123
Affiliation:
1. State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai 200433, China 2. Shanghai Integrated Circuit Manufacturing Innovation Center Co., Ltd., Shanghai 201202, China 3. Zhangjiang Fudan International Innovation Center, Shanghai 200433, China
Abstract
The effect of the source/drain compressive stress on the mechanical stability of stacked Si nanosheets (NS) during the process of channel release has been investigated. The stress of the nanosheets in the stacking direction increased first and then decreased during the process of channel release by technology computer-aided design (TCAD) simulation. The finite element simulation showed that the stress caused serious deformation of the nanosheets, which was also confirmed by the experiment. This study proposed a novel channel release process that utilized multi-step etching to remove the sacrificial SiGe layers instead of conventional single-step etching. By gradually releasing the stress of the SiGe layer on the nanosheets, the stress difference in the stacking direction before and after the last step of etching was significantly reduced, thus achieving equally spaced stacked nanosheets. In addition, the plasma-free oxidation treatment was introduced in the multi-step etching process to realize an outstanding selectivity of 168:1 for Si0.7Ge0.3 versus Si. The proposed novel process could realize the channel release of nanosheets with a multi-width from 30 nm to 80 nm with little Si loss, unlocking the full potential of gate-all-around (GAA) technology for digital, analog, and radio-frequency (RF) circuit applications.
Funder
platform for the development of next-generation integration circuit technology
Subject
General Materials Science,General Chemical Engineering
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