Efficient Approach for Electrical Design and Analysis of High-Speed Interconnect in Integrated Circuit Packages

Abstract

In recent integrated circuit (IC) packages, the structure of the interconnect is highly complex, and the effect of high-frequency parasitics is significant. These factors increase the number and level of design variables and extend the analysis frequency range to tens of gigahertz. As a result of the high dimensions of the design space, it is difficult to reduce the design gap between the current design approach and the physical limits of the practical IC-package interconnect. In this paper, we present an efficient approach for designing and analyzing the electrical characteristics of the high-speed interconnect in IC packages. The proposed approach is developed using a hybrid method involving the design of experiments, the domain decomposition method, and the finite-element method. We present a procedure to identify critical design variables for the IC-package interconnect, and we derive a method to recombine the impedance parameters of a segmented interconnect. The proposed hybrid method is verified by comparing its characteristic impedance (Zo) with the Zo value from a full-wave simulation of a complete interconnect. We demonstrate that the proposed hybrid method significantly reduces the design space of the IC-package interconnect so that we can efficiently and rapidly obtain the optimized solution, thereby improving the system performance.