Affiliation:
1. Department of Electronics, Computer Science and Systems; University of Calabria; Arcavacata di Rende 87036 Rende (CS) Italy
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials
Reference21 articles.
1. Park J Ngo HC Silberman JA Dhong SH 470 ps 64bit Parallel Binary Adder Proc. IEEE Symposium on VLSI Circuits 2000 192 193
2. Efficient Addition Circuits for Modular Design of Processors-in-Memory;Corsonello;IEEE Transactions on Circuits and Systems I: Regular Papers,2005
3. Designing High-Speed Adders in Power-Constrained Environments;Frustaci;IEEE Transactions on Circuits and Systems II: Express Briefs,2009
4. A Novel Hybrid Parallel-Prefix Adder Architecture With Efficient Timing-Area Characteristic;Das;IEEE Transactions on VLSI Systems,2008
5. Comparison of High-Performance VLSI Adders in the Energy-Delay Space;Oklobdzija;IEEE Transactions on VLSI Systems,2005
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献