Reliability Aspects of 28 nm BEOL‐Integrated Resistive Switching Random Access Memory

Abstract

Approaching the application of redox‐based resistive switching random access memory (ReRAM), the research focus shifts more and more toward different aspects of reliability. Herein, it is vital to account for the statistics in large memory blocks, as certain failure mechanisms are observed to only affect a few bits per million. In a cooperation between RWTH Aachen and Infineon Technologies, the variability, retention, and endurance of filamentary valence change memory, integrated into 28 nm CMOS on Mbit scale are comprehensively studied. This article reviews the main findings of this project. It is found that the programmed states follow characteristic normal or log‐normal statistics based on dynamic equilibrium in the random walk of oxygen vacancies in the switching layer, experimentally observed as read noise. On long timescales, these statistics are remarkably stable, providing high data retention. However, the existing long‐term degradation can be characterized by shifting and broadening of the programmed high resistive state distributions. A high endurance of more than 500 k cycles is demonstrated on the Mbit scale. Only a tail of a few devices appears to fail to reset. Via kinetic Monte Carlo modeling, the voltage divider of ReRAM cell and periphery has been identified as the origin of this failure.