Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration
Author:
Affiliation:
1. Tsinghua University, Beijing, China
2. Intel, USA, Hillsboro, OR
Abstract
Publisher
Association for Computing Machinery (ACM)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications
Link
https://dl.acm.org/doi/pdf/10.1145/1142155.1142159
Reference21 articles.
1. A review of 3-D packaging technology
2. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration
3. Partition-driven standard cell thermal placement
4. Floorplanning for 3-D VLSI design
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