Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges-Reference-Cited by-同舟云学术

Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges

Published:2018-05-30 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 on Great Lakes Symposium on VLSI
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Author:

Tala Mahdi¹,Schrape Oliver²,Krstic Milos³,Bertozzi Davide¹

Affiliation:

1. University of Ferrara, Ferrara, Italy

2. IHP Microelectronics, Frankfurt Oder, Germany

3. University of Potsdam & IHP Microelectronics, Potsdam, Germany

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3194554.3194593

Reference27 articles.

1. A.Hansson K.Goossens and A.Radulescu. 2007. Avoiding Message-Dependent Deadlock in Network-based Systems-on-Chip. VLSI Design (2007). A.Hansson K.Goossens and A.Radulescu. 2007. Avoiding Message-Dependent Deadlock in Network-based Systems-on-Chip. VLSI Design (2007).

2. High-Speed Photonics for Side-by-Side Integration With Billion Transistor Circuits in Unmodified CMOS Processes

3. METEOR

4. Architectural Exploration of Chip-Scale Photonic Interconnection Network Designs Using Physical-Layer Analysis

5. D. Dang B. Patra and R. Mahapatra. 2015. A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-Chip Proceedings of the 25th Edition on Great Lakes Symposium on VLSI. 121--126. 10.1145/2742060.2742083 D. Dang B. Patra and R. Mahapatra. 2015. A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-Chip Proceedings of the 25th Edition on Great Lakes Symposium on VLSI. 121--126. 10.1145/2742060.2742083

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