A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-chip
Author:
Affiliation:
1. Texas A&M University, College Station, TX, USA
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2742060.2742083
Reference14 articles.
1. Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
2. A Low-power Low-cost Optical Router for Optical Networks-on-Chip in Multiprocessor Systems-on-Chip
3. Five-port optical router for photonic networks-on-chip
4. Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance
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1. Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges;Proceedings of the 2018 on Great Lakes Symposium on VLSI;2018-05-30
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