Author:
Vaidya Sumit,Dandekar Deepak
Publisher
Academy and Industry Research Collaboration Center (AIRCC)
Subject
Computer Networks and Communications,Hardware and Architecture
Cited by
18 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. High Speed 64 Bit Vedic & Booth Multiplier Implementation Using FPGA;2024 3rd International Conference on Artificial Intelligence For Internet of Things (AIIoT);2024-05-03
2. VLSI Architecture for Reversible Radix-2 FFT using Modified Carry Select Adder;2024 7th International Conference on Devices, Circuits and Systems (ICDCS);2024-04-23
3. 4×4 Array Multiplier Using Transmission Gate Full Adder;2024 IEEE 9th International Conference for Convergence in Technology (I2CT);2024-04-05
4. Optimize Analysis of Combined R2B, R4B and R8B FFT using Single Path Delay Feedback;2024 IEEE International Conference on Big Data & Machine Learning (ICBDML);2024-02-24
5. FPGA implementation of improved 32-bit wallace multiplier;AIP Conference Proceedings;2024