Functional delay test generation based on software prototype

Author:

Bareisa Eduardas,Jusas Vacius,Motiejunas Kestutis,Seinauskas Rimantas

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference25 articles.

1. Underwood B, Law WO, Kang S, Konuk H. Fastpath: a path-delay test generator for standard scan designs. In: Proceedings of 1994 international test conference (1994); 1994. p. 154–63.

2. Pomeranz I, Reddy SM. On testing delay faults in macro-based combinational circuits. In: Proceedings of international conference on computer-aided-design, San Jose, CA; 1994. p. 332–9.

3. Pomeranz I, Reddy SM. Functional test generation for delay faults in combinational circuits. In: Proceedings of 1995 international conference on computer-aided-design (1995); 1995. p. 687–94.

4. Realization-independent ATPG for designs with unimplemented blocks;Kim;IEEE Trans CAD,2001

5. Yi J, Hayes JP. a fault model for function and delay testing. In: Proceedings of the IEEE European test workshop, ETW’ 01; 2001. p. 27–34.

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1. Path delay test generation at functional level;IET Computers & Digital Techniques;2015-05

2. Delay fault testing using partial multiple scan chains;Microelectronics Reliability;2013-12

3. Robust Coupling Delay Test Sets;Journal of Electronic Testing;2012-04-13

4. Evaluation of testability enhancement using software prototype;IET Computers & Digital Techniques;2012

5. Functional fault models for non-scan sequential circuits;Microelectronics Reliability;2011-12

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