Effects of corner angle of trapezoidal and triangular channel cross-sections on electrical performance of silicon nanowire field-effect transistors with semi gate-around structure

Author:

Sato Soshi,Kakushima Kuniyuki,Ahmet Parhat,Ohmori Kenji,Natori Kenji,Yamada Keisaku,Iwai Hiroshi

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference31 articles.

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2. Ultra-narrow silicon nanowire gate-all-around CMOS devices: impact of diameter, channel-orientation and low temperature on device performance;Singh;Tech Dig Int Electron Dev Meet,2006

3. Modeling of stress-retarded thermal oxidation of nonplanar silicon structures for realization of nanoscale devices;Ma;IEEE Electron Dev Lett,2010

4. Bended gate-all-around nanowire MOSFET: a device with enhanced carrier mobility due to oxidation-induced tensile stress;Moselund;Tech Dig Int Electron Dev Meet,2007

5. Fabrication of planar silicon nanowires on silicon-on-insulator using stress limited oxidation;Kedzierski;J Vac Sci Technol B,1997

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