Characterization and modeling of electrical stress degradation in STI-based integrated power devices

Author:

Reggiani Susanna,Barone Gaetano,Gnani Elena,Gnudi Antonio,Baccarani Giorgio,Poli Stefano,Wise Rick,Chuang Ming-Yeh,Tian Weidong,Pendharkar Sameer,Denison Marie

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference76 articles.

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3. Pan R, Todd B, Hao P, Higgins R, Robinson D, Drobny V, et al. High voltage (up to 20V) devices implementation in 0.13 un BiCMOS process technology for system-on-chip (SOC) design. In: 18th Proceedings of the international symposium on power semiconductor devices and ICs; 2006. p. 1–4.

4. High voltage devices in advanced CMOS technologies;Bianchi,2009

5. Minixhofer R, Feilchenfeld N, Knaipp M, Rhrer G, Park J, Zierak M, et al. A 120V 180nm high voltage CMOS smart power technology for system-on-chip integration. In: 22nd Proceedings of the international symposium on power semiconductor devices and ICs; 2010. p. 75–8.

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