Mechanism Analysis and Improved Model for HCI in 200V STI-based Triple RESURF LDMOS With n-p-n Layer-Reference-Cited by-同舟云学术

Mechanism Analysis and Improved Model for HCI in 200V STI-based Triple RESURF LDMOS With n-p-n Layer

Published:2023-05-28 Issue: Volume: Page:
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Container-title:2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)
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Author:

Zheng Zuquan¹,Qiao Ming¹,Liu Wenliang¹,Long Xingrui¹,Xu Penglong²,Ma Chunxia²,Lin Feng²,Zhang Bo¹

Affiliation:

1. University of Electronic Science and Technology of China,State Key Laboratory of Electronic Thin Films and Integrated Devices,Chengdu,P. R. China

2. Technology Development II, CSMC Technologies Co. Ltd,Wuxi,P. R. China

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10147163/10147396/10147414.pdf?arnumber=10147414

Reference14 articles.

1. Investigation of Kirk-Effect Induced Hot-Carrier-Injection in High-Voltage Power Devices

2. Convergence of Hot-Carrier-Induced Saturation Region Drain Current and On-Resistance Degradation in Drain Extended MOS Transistors

3. Influence of Design Considerations on Hot Carrier Injection Degradation of STI-based LDMOS Transistors

4. Investigation of the hot carrier degradation in power LDMOS transistors with customized thick oxide

5. An ultralow specific on-resistance 200V LDMOS for voltage extension of a $0. 18\mu \mathrm{m}$ BCD Process;qiao;International Symposium on Power Semiconductor Devices and ICs,2022

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2. A High-Performance and Low HCI Degradation LDMOS Device With a Hybrid Field Plate;IEEE Journal of the Electron Devices Society;2024