Author:
Novoselov A. S.,Masalskii N. V.
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference25 articles.
1. Bravaix, A., Huard, V., Cacho, F., Federspiel, X., and Royl, D., Hot-carrier degradation in decananometer CMOS Nodes: From an energy-driven to a unified current degradation modeling by a multiple-carrier degradation process, Hot Carrier Degradation in Semiconductor Devices, Grasser, T., Ed., Wien: Springer, 2015, pp. 57–103. https://doi.org/10.1007/978-3-319-08994-2_3
2. Moens, P. and van den Bosch, G., Characterization of total safe operating area of lateral DMOS transistors, IEEE Trans. Device Mater. Reliab., 2006, vol. 6, no. 3, pp. 349–357. https://doi.org/10.1109/tdmr.2006.882212
3. Moens, P., Varghese, D., and Alam, M.A., Towards a universal model for hot carrier degradation in DMOS transistors, Proc. International Symposium on Power Semiconductor Devices and ICs, Barcelona, 2010, IEEE, 2010, pp. 61–64.
4. Wang, W., Reddy, V., Krishnan, A.T., Vattikonda, R., Krishnan, S., and Cao, Y., Compact modeling and simulation of circuit reliability for 65 nm CMOS technology, IEEE Trans. Device Mater. Reliab., 2007, vol. 7, no. 4, pp. 509–517. https://doi.org/10.1109/TDMR.2007.910130
5. Poli, S., Reggiani, S., Baccarani, G., Gnani, E., Gnudi, A., Denison, M., Pendharkar, S., and Wise, R., Hot-carrier stress induced degradation in Multi-STI-Finger LDMOS: An experimental and numerical insight, Solid-State Electron., 2011, vols. 65–66, pp. 57–63. https://doi.org/10.1016/j.sse.2011.06.007