Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures-Reference-Cited by-同舟云学术

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Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures

Published:2007-09 Issue:9 Volume:51 Page:1185-1193
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Kilchytska V.,Collaert N.,Jurczak M.,Flandre D.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference31 articles.

1. .

2. High-performance symmetric-gate and CMOS-compatible Vt asymmetric-gate FinFET devices;Kedzierski;Proc IEDM,2001

3. Ideal rectangular cross-section Si-Fin channel double-gate MOSFETs fabricated using orientation-dependent wet etching;Liu;Electron Dev Lett,2003

4. Spacer FinFET: nanoscale double-gate CMOS technology for the Terabit era;Choi;Solid-State Electron,2002

5. Experimental evaluation of gate architecture influence on DG SOI MOSFETs performance;Widiez;IEEE Trans Electron Dev,2005

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1. Comprehensive evaluation of gate-induced drain leakage in SOI stacked nanowire nMOSFETs operating in high-temperatures;Solid-State Electronics;2024-04

2. Impact of High Temperature Up to 175 °C on the DC and RF Performances of 22-nm FD-SOI MOSFETs;IEEE Transactions on Electron Devices;2023-10

3. High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs;IEEE Journal of the Electron Devices Society;2023

4. The low threshold-voltage shift with temperature and small subthreshold-slope in 28 nm UTBB FDSOI for 300 °C high-temperature application;Journal of Physics D: Applied Physics;2022-03-07

5. 22 nm FD-SOI MOSFET Figures of Merit at high temperatures upto 175 °C;2022 IEEE 22nd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF);2022-01-16

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