Improvement of gate dielectric reliability for p+poly MOS devices using remote PECVD top nitride deposition on ultra-thin (2.4–6 nm) gate oxides-Reference-Cited by-同舟云学术

Improvement of gate dielectric reliability for p+poly MOS devices using remote PECVD top nitride deposition on ultra-thin (2.4–6 nm) gate oxides

Published:1999-03 Issue:3 Volume:39 Page:365-372
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Wu Y,Lucovsky G

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

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3. Defect properties of Si-, O-, N- and H-atoms at Si–SiO2 interfaces;Lucovsky;J Vac Sci Technol B,1996

4. Stress induced leakage current in thin oxide;DiMaria;Microelect Engng,1995

5. Reduction of hot electron degradation in metal oxide semiconductor transistors by deuterium;Lyding;Appl Phys Lett,1996

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3. The effective mass issues in light nitride silicon oxide;Semiconductor Science and Technology;2005-09-14

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5. Breakdown and reliability of p-MOS devices with stacked RPECVD oxide/nitride gate dielectric under constant voltage stress;Microelectronics Reliability;2004-02