Robust TFET SRAM cell for ultra-low power IoT applications
Author:
Funder
UGC
CSIR-JRF
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering
Reference24 articles.
1. Patel HN et al. Optimizing SRAM bitcell reliability and energy for IoT applications. In: 17th international symposium on quality electronic design (ISQED) 2016. pp. 12–17.
2. Circuit and system design guidelines for ultra-low power sensor nodes;Lee;IPSJ Trans Syst LSI Des Method,2013
3. Design and analysis of electrostatic doped Schottky barrier CNTFET based low power SRAM;Singh;AEU Int J Electron Commun,2017
4. Oh TW et al. Power-gated 9T SRAM cell for low-energy operation. IEEE Trans Very Large Scale Integrat (VLSI) Syst 2016; 25(3): pp. 1183–87.
5. 10T SRAM using half-VDD precharge and row-wise dynamically powered read port for low switching power and ultralow RBL leakage;Maroof;IEEE Trans Very Large Scale Integr VLSI Syst,2017
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