10T SRAM Using Half- $V_{\text {DD}}$ Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage-Reference-Cited by-同舟云学术

10T SRAM Using Half- $V_{\text {DD}}$ Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage

Published:2017-04 Issue:4 Volume:25 Page:1193-1203
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Maroof Naeem^ORCID,Kong Bai-Sun^ORCID

Funder

Basic Research Program through the National Research Foundation of Korea

Ministry of Education

Industrial Strategic Technology Development Program funded by the Ministry of Trade, Industry & Energy, Korea

IDEC, KAIST

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/7882729/07801981.pdf?arnumber=7801981

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