1. Low Power High Performance Tunnel FET: Analysis for IOT applications;Tripathi,2019
2. Comprehensive Analysis of 7T SRAM cell architectures with 18nm FinFET for low power biomedical applications;Kumar;Silicon,2021
3. Strategic review on different materials for FinFET structure performance optimization;Bindu Madhavi;IOP Conf. Ser.: Mater. Sci. Eng. (Scopus),2020
4. SRAM cell design for stable 32nm node and beyond;Chang,2005
5. K. Takeda, Low-Vdd static-noise-margin-free for read SRAM cell in high-speed applications, JSSC, pp. 113-121, Jan. 2006.