The abnormality in gate oxide failure induced by stress-enhanced diffusion of polycrystalline silicon

Author:

Ahn Yongseok,Lee Sanghyun,Koh Gwanhyeob,Chung Taeyoung,Kim Kinam

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference14 articles.

1. DRAM technology perspective for stand-alone and embedded applications;Kim;Microelectron Reliab,2000

2. DRAM technology perspective for giga-bit era;Kim;IEEE Transaction of Electronic Devices,1998

3. Post poly-Si gate rapid thermal nitridation for boron penetration reduction and oxide reliability improvement;Zhou;IEEE Electron Device Lett,1998

4. Correlation between gate oxide reliability and the profile of the trench top corner in shallow trench isolation (STI);Park;IEDM Tech Dig,1994

5. Relationship between plasma damage, SILC and gate oxide reliability;Cheung,1999

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1. Ultrathin Vertical Gate Oxide for Trench Power Device Technology;2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2022-03-06

2. Gate Oxide Reliability Characterization of Tungsten Polymetal Gate with Low-Contact-Resistive WSix/WN Diffusion Barrier in Memory Devices;Japanese Journal of Applied Physics;2007-11-06

3. Impact of Thin WSIX Insertion in Tungsten Polymetal Gate on Gate Oxide Reliability and Gate Contact Resistance;2006 IEEE International Reliability Physics Symposium Proceedings;2006

4. Degradation of Nitride/W/WNx/Poly-Si Gate Stack by Post-Thermal Processes;Japanese Journal of Applied Physics;2005-04-21

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