SS < 30 mV/dec; Hybrid tunnel FET 3D analytical model for IoT applications-Reference-Cited by-同舟云学术

SS < 30 mV/dec; Hybrid tunnel FET 3D analytical model for IoT applications

Published:2020-11 Issue: Volume: Page:
ISSN:2214-7853
Container-title:Materials Today: Proceedings
language:en
Short-container-title:Materials Today: Proceedings

Author:

Dharmireddy Ajaykumar,Sharma Avinash,Sushanth Babu M.,Ijjada Sreenivasa Rao

Publisher

Elsevier BV

Subject

General Medicine

Reference46 articles.

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3. Ajaykumar Dharmireddy, Sreenivasa Rao Ijjada, P.H.S. Tejomurthy, Performance analysis of Tri-gate SOI FinFET structure with various fin heights using TCAD simulations, J. Adv. Res. Dynamical Control Syst.-SCOPUS, 11 (2) (2019) 1291–1298.

4. Development of Compact Model for Tunnel Field-effect Transistors, https://www.aist.go.jp/aist_e/list/latest_research/2012/20121031/20121031.html.

5. D. Sudha, Ch. Santhirani, Sreenivasa Rao Ijjada, High Performance and Low leakage 3DSOI Fin-FET SRAM, Am. J. Eng. Appl. Sci., 10 (1) (2017) 101–107.

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