Abstract
Abstract
Nano-membrane tri-gate β-gallium oxide (β-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with the footprint channel width of 50 nm. For high-quality interface between β-Ga2O3 and gate dielectric, atomic layer-deposited 15 nm thick aluminum oxide (Al2O3) was utilized with tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV dec−1, high drain current (I
DS) ON/OFF ratio of 1.5 × 109, and negligible transfer characteristic hysteresis. We also experimentally demonstrated robustness of these devices with current–voltage (I–V) characteristics measured at temperatures up to 400 °C.
Funder
Joint University Microelectronics Program
Applications and Systems-Driven Center for Energy-Efficient Integrated NanoTechnologies
Universities for National Excellence
Naval Enterprise Partnership
the U.S. Department of Energy (DOE), Office of Science, Basic Energy Sciences
Office of Naval Research
Energy Frontier Research Centers
Defense Advanced Research Projects Agency
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Mechanics of Materials,General Materials Science,General Chemistry,Bioengineering
Cited by
10 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献