Abstract
Abstract
This letter reports on initial investigation results on the material quality and device suitability of a homo-epitaxial 3C-SiC growth process. Atomic force microscopy surface investigations revealed root-mean square surface roughness levels of 163.21 nm, which was shown to be caused by pits (35 μm width and 450 nm depth) with a density of 1.09 × 105 cm−2 which had formed during material growth. On wider scan areas, the formation of these were seen to be caused by step bunching, revealing the need for further epitaxial process improvement. X-ray diffraction showed good average crystalline qualities with a full width of half-maximum of 160 arcseconds for the 3C-SiC (002) being lower than for the 3C-on-Si material (210 arcseconds). The analysis of C–V curves then revealed similar interface-trapped charge levels for freestanding 3C-SiC, 3C-SiC on Si and 4H-SiC, with forming gas post-deposition annealed freestanding 3C-SiC devices showing D
IT levels of 3.3 × 1011 cm−2 eV−1 at E
C−E
T = 0.2 eV. The homo-epitaxially grown 3C-SiC material’s suitability for MOS applications could also be confirmed by leakage current measurements.
Funder
Engineering and Physical Sciences Research Council
Horizon 2020 Framework Programme
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Cited by
4 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献