Source/drain eSiGe engineering for FinFET technology-Reference-Cited by-同舟云学术

Source/drain eSiGe engineering for FinFET technology

Published:2017-08-17 Issue:9 Volume:32 Page:094004
ISSN:0268-1242
Container-title:Semiconductor Science and Technology
language:
Short-container-title:Semicond. Sci. Technol.

Author:

Peng Jianwei,Qi Yi,Lo Hsien-Ching,Zhao Pei,Yong Chloe,Yan Jianghu,Dou Xinyuan,Zhan Hui,Shen Yanping,Regonda Suresh,Hu Owen,Yu Hong,Joshi Manoj,Adams Charlotte,Carter Rick,Samavedam Srikanth

Publisher

IOP Publishing

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://iopscience.iop.org/article/10.1088/1361-6641/aa7d3f/pdf

Reference5 articles.

1. Avoiding loading effects and facet growth

2. In-Situ Boron Doped SiGe Epitaxy Optimization for FinFET Source/Drain

3. Strained p-Channel FinFETs With Extended $\Pi$-Shaped Silicon–Germanium Source and Drain Stressors

4. Integration of highly-strained SiGe materials in 14 nm and beyond nodes FinFET technology

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