Rapid Thermal Annealing for Shallow Junction and its Impact on FinFET Integration
Author:
Affiliation:
1. GlobalFoundries,Malta,NY,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10545359/10545360/10545508.pdf?arnumber=10545508
Reference5 articles.
1. Laser spike annealing for advanced CMOS devices
2. Process interactions between low-energy ion implantation and rapid-thermal annealing for optimized ultrashallow junction formation
3. Integration of Advanced Source and Drain Extension Process Using Carbon/Fluorine Co-Implants and Spike Anneal in 65nm PMOS Devices
4. Source/drain eSiGe engineering for FinFET technology
5. Advanced Activation and Deactivation of Arsenic-Implanted Ultra-Shallow Junctions using Flash and Spike + Flash Annealing
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