A Low-Power and High-Frequency Phase Frequency Detector for a 3.33-GHz Delay Locked Loop
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s00034-019-01232-9.pdf
Reference19 articles.
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3. Y.S. Choi, D.H. Han, Gain-boosting charge pump for current matching in phase-locked loop. IEEE Trans. Circuits Syst. II Express Briefs 53(10), 1022–1025 (2006)
4. M. Gholami, Phase detector with minimal blind zone and reset time for GSamples/s DLLs. Circuits Syst. Signal Process. 36(9), 3549–3563 (2017)
5. M. Gholami, G. Ardeshir, Analysis of DLL jitter due to voltage-controlled delay line. Circuits Syst. Signal Process. 32(5), 2119–2135 (2013)
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