Design and optimization of phase frequency detector through Taguchi and ANOVA statistical techniques for fast settling low power frequency synthesizer
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Reference42 articles.
1. A 5.7-6.0 GHz CMOS PLL with low phase noise and -68 dBc reference spur;Li;Int. J. Electron. Commun.,2017
2. A wide frequency range low jitter integer PLL with switch and inverter based CP in 0.18 μm CMOS technology;Sahani;J. Circuits Syst. Comput.,2020
3. Frequency-range enhanced delay locked loop based on varactor-loaded and current-controlled delay elements;Kazeminia;AEU Int. J. Electron. Commun.,2020
4. A 3.1-10.6 GHz 57-bands CMOS frequency synthesizer for UWB-based cognitive radios;Kim;IEEE Trans. Microw. Theory Technol.,2018
5. A dead-zone-free zero blind-zone high-speed phase frequency detector for charge-pump PLL;Kirankumar;Circuits Systems Signal Process.,2020
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