Code Positioning for VLIW Architectures
Author:
Publisher
Springer Berlin Heidelberg
Link
http://link.springer.com/content/pdf/10.1007/3-540-48228-8_34
Reference13 articles.
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2. Abraham Mendlson, Shlomit S. Pinter, and Ruth Shtokhamer. Compile time instruction cache optimizations. In Compiler Construction, pages 404–418, April 1994.
3. W.W. Hwu and P.P. Chang. Achieving high instruction cache performance with an optimizing compiler. In ISCA-16, pages 242–251, Jerusalem, Israel, May 1989.
4. Nikolas Gloy and Michael D. Smith. Procedure placement using temporal-ordering information. ACM TOPLAS, 21(5):977–1027, September 1999.
5. Karl Pettis and Robert C. Hansen. Profile guided code positioning. In PLDI, pages 16–27, White Plains, New York, June 1990.
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