Heterogeneous Void Nucleation Study in Flip Chip Assembly Process Using No-Flow Underfill

Abstract

No-flow underfill process has exhibited a narrow feasible process window due to electrical assembly yield loss or underfill voiding. In general, the assembly yield can be improved using reflow process designed at high temperature, while the high temperature condition potentially causes serious underfill voiding. Typically, the underfill voiding can result in critical defects, such as solders fatigue cracking or solders bridge, causing early failures in thermal reliability. Therefore, this study reviews a classical bubble nucleation theory to model voids nucleation during reflow process. The established model designed a reflow process possibly preventing underfill voiding. The reflow process was validated using systematic experiments designed on the theoretical study with a commercial high I/O counts (5000>), fine-pitch (<150 μm) flip chip. The theoretical model exhibits good agreement with experimental results. Thus, this paper presents systematic studies through the use of structured experimentation designed to achieve a high, stable yield, and void-free assembly process on the classical bubble nucleation theory.