Author:
Nashrudin Muhammad Naqib,Ng Fei Chong,Abas Aizat,Abdullah Mohd. Zulkifly,Ali Mohd. Yusuf Tura,Samsudin Zambri
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference37 articles.
1. Void formation study of flip chip in package using no-flow underfill;Lee,2008
2. No-flow underfill: effect of chip placement speed on the void formation using numerical method;Nashrudin;Microelectron. J.,2021
3. F. C. Ng and M. A. Abas, “Underfill flow in flip-chip encapsulation process: a review,” J. Electron. Packag., Mar. 2021, doi:https://doi.org/10.1115/1.4050697.
4. Regional segregation with spatial considerations based analytical filling time model for non-Newtonian power-law underfill fluid in flip-chip encapsulation;Ng;J. Electron. Packag.,2019
5. Spatial analysis of underfill flow in flip-chip encapsulation;Ng;Solder. Surf. Mt. Technol.,2020
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