Automated Layout Generation and Wiring Area Estimation for 3D Electronic Modules
Author:
Affiliation:
1. University of Bonn, Department of Computer Science, Ro¨merstraße 164, 53117 Bonn
2. GMD National Research Center for Information Technology, Institute for Algorithms and Scientific Computing, Schloß Birlinghoven, 53754 Sankt Augustin
Abstract
Publisher
ASME International
Subject
Computer Graphics and Computer-Aided Design,Computer Science Applications,Mechanical Engineering,Mechanics of Materials
Link
http://asmedigitalcollection.asme.org/mechanicaldesign/article-pdf/123/3/330/5500258/330_1.pdf
Reference21 articles.
1. Bischoff, E. E., and Wa¨scher, G., editors, 1995, EJOR; Special Issue on Cutting and Packing, 84, Elsevier.
2. Lengauer, T., 1990, Combinatorial Algorithms for Integrated Circuit Layout, Applicable Theory in Computer Science, Wiley-Teubner, Chichester-Stuttgart.
3. Lengauer, T. and Mu¨ller, R., 1993, “Robust and Accurate Hierarchical Floorplanning With Integrated Global Wiring,” IEEE Trans. Comput.-Aided Des. Integrated Circuits and Systems,12, No. 6, pp. 802–809.
4. Kolli, A., Cagan, J., and Rutenbar, R., 1996, “Packing of Generic, Three-Dimensional Components Based on Multi-Resolution Modeling,” Proc. R. Soc. London, Ser. A.
5. Szykman, S., and Cagan, J., 1997, “Constrained Three-Dimensional Component Layout Using Simulated Annealing,” ASME J. Mech. Des., 119, No. 1, pp. 28–35.
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