System-Level SRAM Yield Enhancement-Reference-Cited by-同舟云学术

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System-Level SRAM Yield Enhancement

Published: Issue: Volume: Page:
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Container-title:7th International Symposium on Quality Electronic Design (ISQED'06)
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Author:

Kurdahi F.J.,Eltawil A.M.,Young-Hwan Park ,Kanj R.N.,Nassif S.R.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10740/33864/01613133.pdf?arnumber=1613133

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. In-Memory Associative Processors: Tutorial, Potential, and Challenges;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-06

2. System-level memory management based on statistical variability compensation for frame-based applications;ACM Transactions on Embedded Computing Systems;2013-11

3. What is stochastic computation?;ACM SIGDA Newsletter;2010-07

4. Tolerating process variations in large, set-associative caches;ACM Transactions on Architecture and Code Optimization;2009-06

5. Combining system scenarios and configurable memories to tolerate unpredictability;ACM Transactions on Design Automation of Electronic Systems;2008-07

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