System-level memory management based on statistical variability compensation for frame-based applications

Author:

Sanz Concepción1,Gómez José Ignacio1,Tenllado Christian1,Prieto Manuel1,Catthoor Francky2

Affiliation:

1. Universidad Complutense de Madrid, Madrid (Spain)

2. Inter-University Microelectronics Center, Leuven (Belgium)

Abstract

Process variability and dynamic domains increase the uncertainty of embedded systems and force designers to apply pessimistic designs, which become unnecessarily conservative and have a tremendous impact on both performance and energy consumption. In this context, developing uncertainty-aware design methodologies that take both variation at platform and at application level into account becomes a must. These methodologies should mitigate the effects derived from uncertainty, avoiding worst-case assumptions. In this article we propose a comprehensive methodology to tackle two forms of uncertainty: (1) process variation on the memory system, (2) application dynamism. A statistical model has been developed to deal with variability derived from fabrication process, whereas system scenarios are selected to cope with dynamic domains. Both sources of uncertainty are firstly tackled in combination at design time, to be refined later, at setup. As a result, at run time the platform can be successfully adapted to the current application behaviour as well as the current variations. Our simulations show that this methodology provides significant energy savings while still meeting strict timing constraints.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

Reference26 articles.

1. ATOMIUM. http://www.imec.be/design/atomium/. ATOMIUM. http://www.imec.be/design/atomium/.

2. Design and reliability challenges in nanometer technologies

3. CACTI. http://www.hpl.hp.com/research/cacti/. CACTI. http://www.hpl.hp.com/research/cacti/.

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