A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24–30-GHz Sliding-IF 5G Transceivers-Reference-Cited by-同舟云学术

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A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24–30-GHz Sliding-IF 5G Transceivers

Published:2018-07 Issue:7 Volume:53 Page:1988-2000
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Ek Staffan,Pahlsson Tony^ORCID,Elgaard Christian^ORCID,Carlsson Anders^ORCID,Axholt Andreas,Stenman Anna-Karin^ORCID,Sundstrom Lars^ORCID,Sjoland Henrik^ORCID

Funder

European Commission

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/8396884/08341852.pdf?arnumber=8341852

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5. A Wideband LO Generator for 5G FR1 Bands Using a Single LC-VCO-Based Subsampling PLL and a Ring-VCO-Based Fractional-Resolution Frequency Multiplier;IEEE Journal of Solid-State Circuits;2023-12

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