An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver

Author:

Kim Keun-Mok1,Choi Kyung-Sik1,Jung Hyunki1,Yun Byeonghun1,Kim Subin2,Oh Wonkab2,Lee Eui-Soo3,Park Sujin2,Jeong Eui-Rim3,Ko Jinho2,Lee Sang-Gug1

Affiliation:

1. KAIST,Daeieon,Korea

2. PHYCHIPS,Daejeon,Korea

3. Hanbat National University,Daejeon,Korea

Publisher

IEEE

Reference10 articles.

1. An Integrated 2.4GHz ?91.5dBm-Sensitiuity Within-PacketDuty-Cycled Wake-Up Receiver Achieving 2µW at 100ms Latency;bishop;ISSCC,2021

2. A Fully Integrated 0.2V 802.11ba Wake-Up Receiver with -91.5dBm Sensitivity

3. Self-Super-Cutoff Power Gating with State Retention on a 0.3V 0.29fJ/cycle/gate 32b RISC Core in 0.13m CMOS;chen;ISSCC,2013

4. A 2.1mW −109dBm NB-IoT Wake-Up Receiver

5. A Dual-Mode Wi-Fi/BLE Wake-Up Receiver

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