A 0.77mW 1.84nJ/bit Phase Noise Canceling Receiver for QAM and OFDM and Cellular IoT
Author:
Affiliation:
1. University of Michigan,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10599936/10599927/10599970.pdf?arnumber=10599970
Reference9 articles.
1. 21.5 An Integrated 2.4GHz -91.5dBm-Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μ W at 100ms Latency
2. A- 108dBm Sensitivity, -28dB SIR, 130nW to 41µW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver
3. 2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter
4. 31.8 A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving −85dBm/100kb/s Sensitivity, −41dB SIR and 174dB RX FoM in 22nm CMOS
5. A 2.5kb/s −103dBm-Sensitivity Dual- Chirp Modulated ULP Receiver Achieving −41dB SIR;Moosavifar
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