A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios-Reference-Cited by-同舟云学术

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A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios

Published:2023-12 Issue:12 Volume:58 Page:3421-3432
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Bialek Hayden¹^ORCID,Johnston Matthew L.¹^ORCID,Natarajan Arun¹^ORCID

Affiliation:

1. Department of Electrical Engineering and Computer Science (EECS), Oregon State University, Corvallis, OR, USA

Funder

Center for Design Analog and Digital Integrated Circuits (CDADIC) and the National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

https://ieeexplore.ieee.org/ielam/4/10328904/10269154-aam.pdf

Reference29 articles.

1. A 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver

2. A-108 dBm sensitivity, ?28dB SIR, 130nW to 41?W, digitally reconfigurable bit-level duty-cycled wakeup and data receiver;dissanayake;Proc IEEE Custom Integr Circuits Conf (CICC),2020

3. A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture

4. An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver

5. An Interference-Resilient BLE-Compatible Wake-Up Receiver Employing Single-Die Multi-Channel FBAR-Based Filtering and a 4-D Wake-Up Signature

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