7.6 A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation-Reference-Cited by-同舟云学术

7.6 A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation

Published:2023-02-19 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Solid- State Circuits Conference (ISSCC)
language:
Short-container-title:

Author:

Hsieh Sung-En¹,Wei Chun-Hao¹,Xue Cheng-Xin¹,Lin Hung-Wei¹,Tu Wei-Hsuan¹,Chang En-Jui¹,Yang Kai-Taing¹,Chen Po-Heng¹,Liao Wei-Nan¹,Low Li Lian²,Lee Chia-Da¹,Lu Allen-CL¹,Liang Jenwei¹,Cheng Chih-Chung¹,Kang Tzung-Hung¹

Affiliation:

1. MediaTek.,Hsinchu,Taiwan

2. MediaTek,Singapore,Singapore

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10067248/10067251/10067335.pdf?arnumber=10067335

Reference4 articles.

1. A 1.041-Mb/mm² 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications

2. 15.1 A Programmable Neural-Network Inference Accelerator Based on Scalable In-Memory Computing

3. A 28nm 1 Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241 GOPS and 37.01 TOPS/W for 8b-MAC Operations for Edge-AI Devices;wu;ISSCC,2022

4. 15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications

Cited by 19 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm² Analog Compute-in-Memory Macro;IEEE Journal of Solid-State Circuits;2024-09

2. A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs;IEEE Journal of Solid-State Circuits;2024-09

3. Coupled 7T 1C SRAM based in-memory computing architecture with gain/offset error auto-compensated SAR ADC;Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design;2024-08-05

4. A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors;Journal of Real-Time Image Processing;2024-07-31

5. Sparsity-Aware In-Memory Neuromorphic Computing Unit With Configurable Topology of Hybrid Spiking and Artificial Neural Network;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-06