17.5 A 10mW 10-ENOB 1GS/s Ring-Amp-Based Pipelined TI-SAR ADC with Split MDAC and Switched Reference Decoupling Capacitor

Author:

Zhan Mingtao1,Jie Lu1,Sun Nan1

Affiliation:

1. Tsinghua University,Beijing,China

Funder

NSFC

Publisher

IEEE

Reference6 articles.

1. A 0.004mm2 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp;zhan;ISSCC,2022

2. A 1 MS/s to 1 GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm;hershberg;IEEE Symp VLSI Circuits,2020

3. 28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET

4. A 2.3mW 10-bit 170MS/s two-step binary-search assisted time-interleaved SAR ADC

5. 3.2 A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier

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