9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMs
Author:
Affiliation:
1. Tsinghua University,Beijing,China
Funder
Beijing Innovation Center for Future Chip
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10454133/10454267/10454431.pdf?arnumber=10454431
Reference6 articles.
1. A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC
2. A 0.004mm2 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp
3. 17.5 A 10mW 10-ENOB 1GS/s Ring-Amp-Based Pipelined TI-SAR ADC with Split MDAC and Switched Reference Decoupling Capacitor
4. 20.7 A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ
5. A 50MHz-Bandwidth 70.4dB-SNDR Calibration-Free Time-Interleaved 4th-Order Noise-Shaping SAR ADC;Jie
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