Lateral thinking about power devices (LDMOS)
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Publisher
IEEE
Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Study of Breakdown Voltage Improvement of High-Voltage PLDMOS;2023 China Semiconductor Technology International Conference (CSTIC);2023-06-26
2. Study of ESD Reliability on Gate and Drain to Source and substrate Stress by Structure Modulation in 0.18 μm 6 V nLDMOS Devices;2022 IET International Conference on Engineering Technologies and Applications (IET-ICETA);2022-10-14
3. Study on 20 V LDMOS With Stepped-Gate-Oxide Structure for PMIC Applications: Design, Fabrication, and Characterization;IEEE Transactions on Electron Devices;2022-02
4. A Novel Deep Gate LDMOS Structure Using Double P-Trench to Improve the Breakdown Voltage and the On-State Resistance;Silicon;2021-01-02
5. Simulation Study on the Optimization and Scaling Behavior of LDMOS Transistors for Low-Voltage Power Applications;IEEE Transactions on Electron Devices;2020-11
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