Investigation and Modeling of Z-Interference in Poly-Si Channel-Based 3-D NAND Flash Memories-Reference-Cited by-同舟云学术

Investigation and Modeling of Z-Interference in Poly-Si Channel-Based 3-D NAND Flash Memories

Published:2022-02 Issue:2 Volume:69 Page:543-548
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Jo Hyungjun^ORCID,Ahn Sangmin,Shin Hyungcheol

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9690079/09668961.pdf?arnumber=9668961

Reference21 articles.

1. An Accurate Compact Model Considering Direct-Channel Interference of Adjacent Cells in Sub-30-nm nand Flash Technologies

2. Study of the interference and disturb mechanisms of split-page 3D vertical gate (VG) NAND flash and optimized programming algorithms for multi-level cell (MLC) storage;hsieh;Proc Symp VLSI Technol,2013

3. Z-Interference and Z-Disturbance in Vertical Gate-Type 3-D NAND

4. A physics-based Quasi-2D model to understand the wordline (WL) interference effects of junction-free structure of 3D NAND and experimental study in a 3D NAND flash test chip

5. Modeling of program Vth distribution for 3-D TLC NAND flash memory

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