A Novel CSTBT with Hole Barrier for High $dV/dt$ Controllability and Low EMI Noise
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8746072/8757559/08757582.pdf?arnumber=8757582
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Dual injection enhanced super junction TIGBT with narrow mesa and floating-P region;Journal of Computational Electronics;2024-08-23
2. A Novel High-Speed Split-Gate Trench Carrier-Stored Trench-Gate Bipolar Transistor with Enhanced Short-Circuit Roughness;Micromachines;2024-05-22
3. A Novel Trench IGBT With N-P-N Polysilicon Gate Structure for Low EMI Noise and High Robustness;IEEE Transactions on Electron Devices;2024-04
4. Optimized Trench IGBT With Dummy Gate and Buried n-Type CS Layer for Substantial Reduction of Power Loss and EMI Noise;IEEE Transactions on Electron Devices;2024
5. Device Design Direction of CSTBT for Low Loss and EMI Noise;IEEE Transactions on Electron Devices;2023-12
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