13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs

Author:

Kouchi Toshiyuki,Kumazaki Noriyasu,Yamaoka Masashi,Bushnaq Sanad,Kodama Takuyo,Ishizaki Yuki,Deguchi Yoko,Sugahara Akio,Imamoto Akihiro,Asaoka Norichika,Isomura Ryosuke,Handa Takaya,Sato Junichi,Komai Hiromitsu,Okuyama Atsushi,Kanagawa Naoaki,Kajiyama Yasufumi,Terada Yuri,Ohnishi Hidekazu,Yabe Hiroki,Hsu Cynthia,Kakoi Mami,Yoshihara Masahiro

Publisher

IEEE

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 6.4Gbps/pin NAND Flash Memory Multi-Chip Package Employing a Frequency Multiplying Bridge Chip for Scalable Performance and Capacity Storage Systems;2023 IEEE Asian Solid-State Circuits Conference (A-SSCC);2023-11-05

2. Cache in Hand: Expander-Driven CXL Prefetcher for Next Generation CXL-SSD;Proceedings of the 15th ACM Workshop on Hot Topics in Storage and File Systems;2023-07-09

3. CDB;Proceedings of the 59th ACM/IEEE Design Automation Conference;2022-07-10

4. ADAR: Application-specific Data Allocation and Reprogramming Optimization for 3D TLC Flash Memory;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022

5. A Novel Program Suspend Scheme for Improving the Reliability of 3D NAND Flash Memory;IEEE Journal of the Electron Devices Society;2022

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