Effect of traps on transient bit-line current behavior in word-line stacked nand flash memory with poly-Si body-Reference-Cited by-同舟云学术

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Effect of traps on transient bit-line current behavior in word-line stacked nand flash memory with poly-Si body

Published:2014-06 Issue: Volume: Page:
ISSN:
Container-title:2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers
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Author:

Kang Ho-Jung,Jeong Min-Kyu,Joe Sung-Min,Seo Ji-Hyun,Park Sung-Kye,Jin Sung Hun,Park Byung-Gook,Lee Jong-Ho

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6886509/6894335/06894348.pdf?arnumber=6894348

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Investigation of Program Efficiency Overshoot in 3D Vertical Channel NAND Flash with Randomly Distributed Traps;Nanomaterials;2023-04-24

2. Quantitative analysis of irregular channel shape effects on charge-trapping efficiency using massive 3D NAND data;Materials Science in Semiconductor Processing;2023-04

3. Depassivation of Traps in the Polysilicon Channel of 3D NAND Flash Arrays: Impact on Cell High-Temperature Data Retention;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03

4. Analysis of High-Temperature Data Retention in 3D Floating-Gate nand Flash Memory Arrays;IEEE Journal of the Electron Devices Society;2023

5. A comparison of modeling approaches for current transport in polysilicon-channel nanowire and macaroni GAA MOSFETs;Journal of Computational Electronics;2020-10-20

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