1. Bit cost scalable technology with punch and plug process for ultra high density flash memory;Tanaka;VLSI Symp. Tech. Dig.,2007
2. Pipe-shaped BiCS flash memory with 16 stacked layers and multi-level-cell operation for ultra high density storage devices;Katsumata;VLSI Symp. Tech. Dig.,2009
3. Vertical cell array using TCAT (Terabit Cell Array Transistor) technology for ultra high density NAND flash memory;Jang;VLSI Symp. Tech. Dig.,2009
4. Device considerations for high density and highly reliable 3D NAND flash cell in near future;Choi;IEDM Tech. Dig.,2012
5. A 3.3 V 4 Gb four-level NAND flash memory with 90 nm CMOS technology, ISSCC Dig;Lee;Tech. Papers,2004